Features: • Single 3.3V and 5.0V power supply• Four Philips industry standard full duplex UART channels• Sixteen byte receiver FIFOs for each UART• Sixteen byte transmit FIFOs for each UART• In band flow control using programmable Xon/Xoff characters• Flow contr...
SC28L194: Features: • Single 3.3V and 5.0V power supply• Four Philips industry standard full duplex UART channels• Sixteen byte receiver FIFOs for each UART• Sixteen byte transmit FIFO...
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| SYMBOL | PARAMETER | RATING | UNIT |
| Tamb | Operating ambient temperature range2 | See Note 3 | °C |
| Tstg | Storage temperature range | -65 to +150 | °C |
| VCC | Voltage from VDD to VSS4 | -0.5 to +7.0 | V |
| VSS | Voltage from any pin to VSS | -0.5 to VCC + 0.5 | V |
| PD | Package Power Dissipation (PLCC) | 2.87 | W |
| PD | Package Power Dissipation (LQFP) | 2 | W |
| Derating factor above 25°C (PLCC package) | 23 | mW/°C | |
| Derating factor above 25°C (LQFP package) | 16 | mW/°C |
The Philips SC28L194 Quad UART is a single chip CMOS-LSI communications device that provides 4 full-duplex asynchronous channels with significantly deeper 16 byte FIFOs, Automatic in-band flow control using Xon/Xoff characters defined by the user and address recognition in the Wake-up mode. Synchronous bus interface is used for all communication between host and QUART. It is fabricated in Philips state of the art CMOS technology that combines the benefits of low cost, high density and low power
consumption.
The operating speed of each receiver and transmitter SC28L194 can b selected independently from one of 22 fixed baud rates, a 16X clock derived from one of two programmable baud rate counters or one of three external 16X clocks (1 available at 1x clock rate). The baud rate generator and counter can operate directly from a crystal or
from seven other external or internal clock inputs. The ability to independently program the operating speed of the receiver and transmitter makes the Quad UART particularly attractive for dual speed full duplex channel applications such as clustered terminal systems. The receivers and transmitters are buffered with FIFOs of 16 characters to minimize the potential for receiver overrun and to reduce interrupt overhead. In addition, a handshaking capability and in-band flow control are provided to disable a remote UART transmitter when the receiver buffer is full or nearly so.