SC28L202

•Member of IMPACT family: 3.3 to 5.0 volt , 40°C to +85°C and68K for 80xxx bus interface for all devices.
• Dual fullduplex independent asynchronous receiver/transmitters
• 256 character FIFOs for each receiver and transmitter
• Powers up to 9600 baud, 1 stop bit, no parity, 1 stop bit, interruptdisabled, all I/O set to input.
• Three character recognition system per channel, used as: General purpose character recognition Xon/Xoff character recognition Address recognition Wake up (multidrop or "9 bit") mode System provides 4 levels of automation on a recognition event
• Programmable data format 5 to 8 data bits plus parity and 9 bit mode Odd, even, no parity or force parity 9/16,1, 1.5 or 2 stop bits
• 16bit programmable Counter/Timer
• Programmable baud rate for each receiver and transmitterselectable from: 27 fixed rates: 50 to 2.0 Meg baud (includes MIDDI rate) Other baud rates via external clocks and C/T Programmable userdefined rates derived from aprogrammable Counter/timer External 1X or 16X clock
• Parity, framing, and overrun error detection
• False start bit detection
• Line break detection and generation
• Programmable channel mode Normal (fullduplex) Automatic echo Local loop back Remote loop back Multidrop mode (also called 'wakeup' or '9bit')
•Multifunction 8 bit I/O input port per channel loosely assigned toeach channel. Can serve as clock or control inputs Change of state detection on eight inputs Inputs have typically >100Mohm pullup resistors Modem and DMA interface
• Versatile arbitrating interrupt system Interrupt system totally supports 'single query' polling Output port can be configured to provide a total of up to sixseparate interrupt type outputs that may be wire ORed(switched to open drain). Each FIFO can be independently programmed for any of 256interrupt levels Watch dog timer for each receiver
•Maximum data transfer rates: 1X 3 Mb/sec, 16X 2 Mb/sec
• Automatic wakeup mode for multidrop applications
• Startend break interrupt/status
• Detects break which originates in the middle of a character
• Onchip crystal oscillator
• Power down mode at less than 10 µa
• Receiver timeout mode
• Single +3.3V or +5V power supply

The SC28L202 is a high performance dual UART. Its functional andprogramming features closely match but greatly extend those ofprevious Philips dual channel UARTs. Its configuration on power upis similar that of the SC26C92. Its differences from the SC26C92are: 256character receiver, 256 character transmit FIFOs, 3 and 5volt compatibility, 8 I/O ports for each UART 16 total, arbitratinginterrupt system and overall faster buss and data speeds. SC28L202 isfabricated in an advanced 0.5 micron CMOS process that allowsstand by current of less that 10 microamperes.

SC28L202 is a member of the IMPACT line of Data Communications partsPin or register programming will allow the device to operate witheither the Motorola or Intel bus interface by changing the function ofsome pins (reset is inverted, DACKN, and IACKN enabled forexample).

The Philips Semiconductors SC28L202 Dual Universal AsynchronousReceiver/Transmitter (DUART) is a singlechip CMOSLSIcommunications device that provides two fullduplex asynchronousreceiver/transmitter channels in a single package. It interfacesdirectly with microprocessors and may be used in a polled orinterrupt driven system. The use of the Interrupt system providesintelligent interrupt vectors.

The operating mode and data format of each channel SC28L202 may beprogrammed independently. Additionally, each receiver andtransmitter can select its operating speed as one of twentysevenfixed baud rates; a 16X clock derived from one of two programmablecounter/timers, or an external 1X or 16X clock. The baud rategenerator and counter/timer can operate directly from a crystal orfrom external clock inputs. The ability to independently program theoperating speed of the receiver and transmitter make the DUARTparticularly attractive for dualspeed channel applications such asclustered terminal systems and bridges.

Each receiver and transmitter SC28L202 is buffered by 256 character FIFOs tonearly eliminate the potential of receiver overrun, transmitterunderrun and to reduce interrupt overhead in interrupt drivensystems. In addition, a flow control capability (Xon/Xoff andRTS/CTS) is provided to disable a remote transmitter when thereceiver buffer is full.

Also provided on the 28L202 is a multipurpose 8bit I/O for eachchannel. These can be used as generalpurpose I/O ports or can beassigned specific functions (such as clock inputs or status andinterrupt outputs) under program control. Normally they will be usedfor modem control and DMA interface. All ports have change of statedetectors and input sections are always active making outputsignals available to the internal circuits and the control processor.

The 28L202 are available in 52pin plastic quad flat pack (PQFP),or 56-pin TSSOP packages.