SCH5017 General Description
SCH5017 Features
General Features
- 3.3 Volt Operation (SIO Block is 5 Volt Tolerant)
- LPC Interface
- Programmable Wake-up Event Interface
- PC99, PC2001 Compliant
- ACPI 2.0 Compliant
- Multiplexed Command, Address and Data Bus
- Serial IRQ Interface Compatible with Serialized Support for PCI Systems
- PME Interface
- ISA Plug-and-Play Compatible Register Set
- 25 General Purpose Input/Output Pins
- System Management Interrupt
AC Power Failure Recovery
Watchdog Timer
2.88MB Super I/O Floppy Disk Controller
- Licensed CMOS 765B Floppy Disk Controller
- Software and Register Compatible with SMSC's Proprietary 82077AA Compatible Core
- Supports One Floppy Drive
- Configurable Open Drain/Push-Pull Output Drivers
- Supports Vertical Recording Format
- 16-Byte Data FIFO
- 100% IBM® Compatibility
- Detects All Overrun and Underrun Conditions
- Sophisticated Power Control Circuitry (PCC) Including Multiple Powerdown Modes for Reduced Power Consumption
- DMA Enable Logic
- Data Rate and Drive Control Registers
- 480 Address, Up to Eight IRQ and Three DMA Options
- Support 3 Mode FDD
Enhanced Digital Data Separator
- 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250 Kbps Rates
- Programmable Precompensation Modes
Serial Ports
- Two Full Function Serial Ports
- High Speed NS16C550A Compatible UARTs with Send/Receive 16-Byte FIFOs
- Supports 230k and 460k Baud
- Programmable Baud Rate Generator
- Modem Control Circuitry
- 480 Address and 15 IRQ Options
Infrared Port
- Multiprotocol Infrared Interface
- IrDA 1.0 Compliant
- SHARP ASK IR
- 480 Addresses, Up to 15 IRQ
Multi-Mode™ Parallel Port with ChiProtect™
- Standard Mode IBM PC/XT®, PC/AT®, and PS/2™ Compatible Bi-directional Parallel Port
- Enhanced Parallel Port (EPP) Compatible - EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant)
- IEEE 1284 Compliant Enhanced Capabilities Port (ECP)
- ChiProtect Circuitry for Protection
- 960 Address, Up to 15 IRQ and Three DMA Options
Keyboard Controller
- 8042 Software Compatible
- 8 Bit Microcomputer
- 2k Bytes of Program ROM
- 256 Bytes of Data RAM
- Four Open Drain Outputs Dedicated for Keyboard/Mouse Status Register
- Supports Interrupt and Polling Access
- 8 Bit Counter Timer
- Port 92 Support
- Fast Gate A20 and KRESET Outputs
Motherboard GLUE Logic
- IDE Reset Output
- (4) Buffered PCI Reset Outputs with software controlled reset capability - default transparent
- 3VSB Gate and 3V Gate signal generation
- Front Panel Reset Debouncing and Power Good Signal Generation
- Power Supply Turn On Circuitry with Support for power button on PS/2 Keyboard
- Resume Reset Signal Generation
- SMBus Isolation Circuitry (2 sets external and 1 set internal for Hardware Monitoring Block)
- SMBus 2.0 compliant interface for Hardware Monitoring
- LED Control (2)
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