SCN26562 General Description
SCN26562 Features
Dual full-duplex synchronous/asynchronous receiver and transmitter
Multiprotocol operation
¤ BOP: HDLC/ADCCP, SDLC, SDLC loop, X.25 or X.75 link level,etc.
¤ COP: BISYNC, DDCMP
¤ ASYNC: 5-8 bits plus optional parit
Four character receiver and transmitter FIFOs
0 to 4Mbit/sec data rate
Programmable bit rate for each receiver and transmitter selectable from:
¤ 16 fixed rates: 50 to 38.4k baud
¤ One user-defined rate derived from programmable counter/timer
¤ External 1X or 16X clock
¤ Digital phase-locked loop
Parity and FCS (frame check sequence LRC or CRC) generation and checking
Programmable data encoding/decoding: NRZ, NRZI, FM0, FM1, Manchester
Programmable channel mode: full- and half-duplex, auto-echo, or local loopback
Programmable data transfer mode: polled, interrupt, DMA, wait
DMA interface
¤ Single- or dual-address dual transfers
¤ Half- or full-duplex operation
¤ Automatic frame termination on counter/timer terminal count or DMA EOPN input
Interrupt capabilities
¤ Vector output (fixed or modified by status)
¤ Programmable internal priorities
¤ Maskable interrupt conditions
Multi-function programmable 16-bit counter/timer
¤ Bit rate generator
¤ Event counter
¤ Count received or transmitted characters
¤ Delay generator
¤ Automatic bit length measurement
Modem controls
¤ RTS, CTS, DCD, and up to four general purpose pins per channel
¤ CTS and DCD programmable auto-enables for Tx and Rx
¤ Programmable interrupt on change of CTS or DCD
On-chip oscillator for crystal
TTL compatible
Single +5V power supply
SCN26562 Connection Diagram
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