SK10LVE111

The SK100LVE is a low skew 1-to-9 differential driver designed with clock distribution in mind. The SK100LVE111Õs function  and performance are similar to the SK100E111, with the added feature of low voltage operation. SK100LVE accepts one signal input which can be either differential or single-ended if the VBB output s used. The signal is fanned out to 9 identical differential outputs.

The SK100LVE is specifically designed, modeled, and produced with low skew as the key goal. Optimal design and layout serve to minimize gate-to-gate skew within a device, and
 haracterization of SK100LVE is used to determine process control limits that ensure consistent tpd distributions from lot to lot. The net result is a dependable, guaranteed low skew device. To ensure that the tight skew specification is met, it is necessary that both sides of the differential output are terminated into 50W, even if only one side is being used. In most applications, all nine differential pairs of SK100LVE will be used and therefore terminated. In the case where fewer than nine pairs are used, it is necessary to terminate at least the output pairs on the same package side as the pair(s) being used on that side in order to maintain minimum skew. Failure to do this will result in small degradations of propagation delay (on the order of 10Ð20ps) of the output(s) being used which, while not being catastrophic to most designs, will mean a loss of skew margin. October 6, 1999 28 Pin PLCC Package Preliminary Information This document contains information on a new product. The parametric information about SK100LVE, although not fully characterized, is the result of testing initial devices.

Low Voltage 1:9 Differential ECL / PECL Clock Driver The SK100LVE111, as with most other ECL devices, SK100LVE can be operated from a positive VCC supply in PECL mode. This allows the LVE111 to be used for high performance clock distribution in +3.3V systems. Designers of SK100LVE can take advantage of the LVE111Õs performance to distribute low skew clocks across the backplane or the board. In a PECL environment, series or Thevenin line terminations are typically used as they require no additional power supplies. For systems incorporating GTL, parallel termination of SK100LVE offers the lowest power by taking advantage of the 1.2V supply as a terminating voltage.