Features: · Operating Voltage Range: 3.0 to 18 V· Maximum input current of 1 mA at 18 V over full packagetemperature range; 100 nA at 18 V and 25°C· Noise margin (over full package temperature range):-1.0 V min @ 5.0 V supply-2.0 V min @ 10.0 V supplyPinoutSpecifications Symbol Parameter ...
SL4015B: Features: · Operating Voltage Range: 3.0 to 18 V· Maximum input current of 1 mA at 18 V over full packagetemperature range; 100 nA at 18 V and 25°C· Noise margin (over full package temperature range...
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Symbol | Parameter |
Value |
Unit |
VCC | DC Supply Voltage (Referenced to GND) |
-0.5 to +20 |
V |
VIN | DC Input Voltage (Referenced to GND) |
-0.5 to VCC +0.5 |
V |
VOUT | DC Output Voltage (Referenced to GND) |
-0.5 to VCC +0.5 |
V |
IIN | DC Input Current, per Pin |
±10 |
mA |
PD | Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ |
750 500 |
mW |
PD | Power Dissipation per Output Transistor |
100 |
mW |
Tstg | Storage Temperature |
-65 to +150 |
°C |
TL | Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) |
260 |
°C |
The SL4015B consists of two identical, independent, 4-stage serialinput/ parallel-output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. "Q" outputs of the SL4015B are available from each of the four stages on both registers. All register stages are D-type, master-slave flip-flops. The logic level present at the DATA input is transferred into the first register stage and shifted over one stage at each positive-going clock transition. Resetting of all stages is accomplished by a high level on the reset line. Register expansion to 8 stages using one SL4015B package, or to more than 8 stages using additional SL4015B's is possible.