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SL74HC299

Features: · Outputs Directly Interface to CMOS, NMOS, and TTL· Operating Voltage Range: 2.0 to 6.0 V· Low Input Current: 1.0 mA· High Noise Immunity Characteristic of CMOS DevicesPinoutSpecifications Symbol Parameter Value Unit VCC DC Supply Voltage (Referenced to GND) -0.5 to +...

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SeekIC No. : 004492691 Detail

SL74HC299: Features: · Outputs Directly Interface to CMOS, NMOS, and TTL· Operating Voltage Range: 2.0 to 6.0 V· Low Input Current: 1.0 mA· High Noise Immunity Characteristic of CMOS DevicesPinoutSpecification...

SL74HC299 Data Sheet

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Part Number:
SL74HC299
Supply Ability:
5000

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  • 1~5000
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  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

·  Outputs Directly Interface to CMOS, NMOS, and TTL
·  Operating Voltage Range: 2.0 to 6.0 V
·  Low Input Current: 1.0 mA
·  High Noise Immunity Characteristic of CMOS Devices


Pinout

Connection Diagram


Specifications

Symbol Parameter
Value
Unit
VCC DC Supply Voltage (Referenced to GND)
-0.5 to +7.0
V
VIN DC Input Voltage (Referenced to GND)
-1.5 to VCC +1.5
V
VOUT DC Output Voltage (Referenced to GND)
-0.5 to VCC +0.5
V
IIN DC Input Current, per Pin
±20
mA
IOUT DC Output Current, per Pin
±35
mA
Icc DC Supply Current, VCC and GND Pins
±75
mA
PD Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
750
500
mW
Tstg Storage Temperature
-65 to +150
°C
TL Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
260
°C



Description

The SL74HC299 is identical in pinout to the LS/ALS299. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
 
The SL74HC299 features a multiplexed parallel input/output data port to achieve full 8-bit handling in a 20 pin package. Due to the large output drive capability and the 3-state feature, this device is ideally suited for interface with bus lines in a bus-oriented system.

Two Mode-Select inputs and two Output Enable inputs are used to choose the mode of operation as listed in the Function Table. Synchronous parallel loading is accomplished by taking both Mode- Select lines, S1 and S2, high. This places the outputs in the highimpedance state, which permits data applied to the data port to be clocked into the register. Reading out of the register can be accomplished when the outputs of the SL74HC299 are enabled. The active-low asynchronous Reset overrides all other inputs.




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