Features: • 100K Compatible• TTL Clock and ECL Control Inputs• Noninverting Outputs• Flow-Through Architecture Optimizes PCB Layout• Center Pin VCC, VEE, and GND Configurations Minimize High-Speed Switching Noise• Package Options Include Small Outline Packages...
SN100KT5578: Features: • 100K Compatible• TTL Clock and ECL Control Inputs• Noninverting Outputs• Flow-Through Architecture Optimizes PCB Layout• Center Pin VCC, VEE, and GND Config...
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PinoutSpecificationsSupply voltage range, VCC . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V...
Features: • 100K Compatible• Open-Collector Outputs Drive Bus Lines or Buffer Memory A...

This SN100KT5578 octal TTL-to-ECL translator is designed to provide efficient translation between a TTL signal environment and a 100K ECL signal environment. This device is designed specifically to improve the performance and density of TTL-to-ECL CPU/ bus-oriented functions such as memoryaddress drivers,clock drivers, and bus-oriented receivers and transmitters.
The eight flip-flops of the SN100KT5578 are edge-triggered D-type flip-flops. On the positive transition of the clock, the Q outputs are set to the logic levels that were set up at the D inputs.
The output-control input OE does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are off.
The SN100KT5578 is characterized for operation from 0°C to 85°C.