SN54ABT16245A

Features:

* Members of the Texas Instruments Widebus(TM) Family
* State-of-the-Art EPIC-IIB(TM) BiCMOS Design Significantly Reduces Power Dissipation
* Typical VOLP (Output Ground Bounce) <1 V at V_CC = 5 V, T_A  = 25
* High-Impedance State During Power Up and Power Down
* Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
* Flow-Through Architecture Optimizes PCB Layout
* High-Drive Outputs (32-mA IOH, 64-mA IOL)
* Latch-Up Performance Exceeds 500 mA Per JESD 70
* ESD Protection Exceeds 2000 V Per
   MIL-STD-883, Method 3015; Exceeds 200 V
   Using Machine Model (C = 200 pF, R = 0)
* Package Options Includes Plastic Thin Very
   Small-Outline (DGV), Shrink Small-Outline (DL), and Thin Shrink Small-Outline (DGG)
   Packages and 380-mil Fine-Pitch Ceramic (WD) Flat Package Using 25-mil
   Center-to-Center Spacings


Pinout




Specifications

		MIN  MAX	UNIT
VCC Supply voltage range		0.5    7	V
VI Input voltage range (except I/O ports)(2)		0.5    7	V
VO Voltage range applied to any output in the high or power-off state		0.5  5.5	V
IO Current into any output in the low state	SN54ABT16245A	96	mA
	SN74ABT16245A	128
IIK Input clamp current	VI < 0	18	mA
IOK Output clamp current	VO< 0	50	mA
JA Package thermal impedance(3)	DGG package	89	/W
	DGV package	93
	DL package	94
Tstg Storage temperature range		65  150

Description

The SN54ABT16245A devices are 16-bit noninverting 3-state transceivers designed for synchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.

These SN54ABT16245A devices can be used as two 8-bit transceviers or one 16-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated.