SN54ABT162827

• Output Ports Have Equivalent 25- Series Resistors, So No External Resistors Are Required
• Members of the Texas Instruments Widebus^TM Family
• State-of-the-Art EPIC-II B^TM BiCMOS Design Significantly Reduces Power Dissipation
• Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
• Typical V_OLP (Output Ground Bounce) < 1 V at V_CC = 5 V, T_A = 25°C
• Distributed V_CC and GND Pin Configuration Minimizes High-Speed Switching Noise
• Flow-Through Architecture Optimizes PCB Layout
• Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings

The SN54ABT162827 are noninverting 20-bit buffers composed of two 10-bit buffers with separate output-enable signals. For either 10-bit buffer, the two output-enable (1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must both be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 10-bit buffer are in the high-impedance state.

The outputs, which are designed to source or sink up to 12 mA, include 25-W series resistors to reduce overshoot and undershoot. To ensure the high-impedance state during power up or power down, OE inputs should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54ABT162827 is available in TI's shrink small-outline package (DL), which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.

The SN54ABT162827 is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74ABT162827 is characterized for operation from 40°C to 85°C.