SN54ABT16540 Selling Leads, Price trend, SN54ABT16540 DataSheet download, circuit diagram from SeekIC.com

Features: Members of the Texas Instruments WidebusTM FamilyState-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power DissipationLatch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17Typical VOLP (Output Ground Bounce)< 1 V at VCC = 5 V, TA = 25 CDistributed VCC and GND Pin ...

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SeekIC No. : 004496290 Detail

SN54ABT16540: Features: Members of the Texas Instruments WidebusTM FamilyState-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power DissipationLatch-Up Performance Exceeds 500 mA Per JEDEC Standard JE...

SN54ABT16540 Data Sheet

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Part Number:: SN54ABT16540
Supply Ability:: 5000

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Product Details

Description

Features:

Members of the Texas Instruments Widebus^TM Family
State-of-the-Art EPIC-II B^TM BiCMOS Design Significantly Reduces Power Dissipation
Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
Typical V_OLP (Output Ground Bounce)< 1 V at V_CC = 5 V, T_A = 25 C
Distributed V_CC and GND Pin Configuration Minimizes High-Speed Switching Noise
Flow-Through Architecture Optimizes PCBLayout
High-Drive Outputs (32-mA I_OH , 64-mA I_OL )
Package Options Include Plastic 300-mil Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG), and Thin Very Small-Outline (DGV) Packages, and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings

Pinout

Connection Diagram

Specifications

Supply voltage range, V_CC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
Input voltage range, V_I(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
Voltage range applied to any output in the high or power-off state, V_O. . . . . . . . . . . . . . . . . . . . .0.5 V to 5.5 V
Current into any output in the low state, I_O: SN54ABT16540 96 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
SN74ABT16540A 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . ... .... .... .... .... .... .... .... .... .... .... .... .... .... ...128 mA
Input clamp current, I_IK(V_I< 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 mA
Output clamp current, I_OK (V_O< 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 mA
Package thermal impedance, q JA (see Note 2): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. .. .. . 89/W
DGV package . . . . . . . . . .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. 93/W
DL package . . . . . . . . . . . . . .. .. .. .. .. .. .. .. .. .. .. .. .... .... .94/W
Storage temperature range, T_stg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 to 150

Description

The SN54ABT16540 and SN74ABT16540A are inverting 16-bit buffers/drivers composed of two 8-bit sections with separate output-enable gates. These SN54ABT16540 and SN74ABT16540A buffers and bus drivers provide a high-performance bus interface for wide data paths.

The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1 or OE2) input is high, all corresponding outputs of SN54ABT16540 and SN74ABT16540A are in the high-impedance state.To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.The SN54ABT16540 is characterized for operation over the full military temperature range of 55 to 125. The SN74ABT16540A is characterized for operation from 40 to 85.

SN54ABT16540

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