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SN54ABT16843

Features: ` Members of the Texas Instruments WidebusE Family` State-of-the-Art EPIC-II BE BiCMOS Design Significantly Reduces Power Dissipation ` Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise` Flow-Through Architecture Optimizes PCB Layout` High-Impedance State Dur...

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SN54ABT16843: Features: ` Members of the Texas Instruments WidebusE Family` State-of-the-Art EPIC-II BE BiCMOS Design Significantly Reduces Power Dissipation ` Distributed VCC and GND Pin Configuration Minimizes ...

SN54ABT16843 Data Sheet

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Part Number:
SN54ABT16843
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/24

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Product Details

Description



Features:

` Members of the Texas Instruments WidebusE Family
` State-of-the-Art EPIC-II BE BiCMOS Design Significantly Reduces Power Dissipation
` Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
` Flow-Through Architecture Optimizes PCB Layout
` High-Impedance State During Power Up and Power Down
` High-Drive Outputs (32-mA IOH, 64-mA IOL)
` Package Options Include Plastic Thin Shrink Small-Outline (DGG), 300-mil Shrink Small-Outline (DL) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings


Application

Connection Diagram


Specifications

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 7 V
Voltage range applied to any output in the high or power-off state, VO  . . . . . . . . .. . .0.5 V to 5.5 V
Current into any output in the low state, IO:SN54ABT16843 . . . . . . . . . . . . . . . . . . . . . . . . . . . .96 mA 
                                                                      SN74ABT16843 . . . . . . . . . . . . . . . . . . . . . . . . . . .128 mA
Input clamp current, IIK (VI < 0)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 mA
Output clamp current, IOK (VO < 0)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 mA
Package thermal impedance, JA (see Note 2): DGG package  . . . . . . . . . . . . . . . . . . . . .  . . . .81°C/W
                                                                          DL package  . . . . . . . . . . . . . . . . . . . . . . . .  . . .74°C/W
Storage temperature range, Tstg  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . .65°C to 150°C


Description

The 'ABT16843 18-bit bus-interface D-type latches are designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The 'ABT16843 can be used as two 9-bit latches or one 18-bit latch. The 18 latches are transparent D-type latches. The device provides true data at its outputs.

A buffered output-enable (OE) input of 'ABT16843 can be used to place the nine outputs in either a normal logic state (high or low logic levels) or a high-impedance state. The outputs are in the high-impedance state during power up and power down. The outputs of 'ABT16843 remain in the high-impedance state while the device is powered down. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.




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