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SN54ABT5400

Features: • Output Ports Have 25- Series Resistors, So No External Resistors Are Required• State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation• Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17• Typical VOLP (Output Ground Bounce)...

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SeekIC No. : 004496341 Detail

SN54ABT5400: Features: • Output Ports Have 25- Series Resistors, So No External Resistors Are Required• State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation• Latch...

SN54ABT5400 Data Sheet

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Part Number:
SN54ABT5400
Supply Ability:
5000

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  • 1~5000
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  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Output Ports Have 25- Series Resistors, So No External Resistors Are Required
• State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation
• Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
• Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
• Typical VOLV (Output Undershoot) < 0.5 V at VCC = 5 V, TA = 25°C
• Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK) and DIPs (JT)


Pinout

Connection Diagram


Specifications

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . . 0.5 V to 7 V
Voltage range applied to any output in the disabled or power-off state, VO . . . . . . . .  . .0.5 V to 5.5 V
Current into any output in the low state, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Input clamp current, IIK(VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 mA
Maximum power dissipation at TA = 55°C (in still air) (see Note 2): DW package  . . . . . . . . . . . . . .1.2 W
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . .. .65°C to 150°C


Description

These 11-bit buffers and line drivers SN54ABT5400 is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1 or OE2) input is high, all 11 outputs are in the high-impedance state.

The outputs, SN54ABT5400 is designed to source or sink up to 12 mA, include 25-W series resistors to reduce overshoot and undershoot.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor SN54ABT5400 is determined by the current-sinking capability of the driver.

The SN54ABT5400 is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74ABT5400 is characterized for operation from 40°C to 85°C.




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