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SN54ABT640

Features: State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power DissipationESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17Typical VOLP (Output Ground Bou...

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SN54ABT640: Features: State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power DissipationESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF,...

SN54ABT640 Data Sheet

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Part Number:
SN54ABT640
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

 State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation
 ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
 Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
 Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
 High-Drive Outputs (32-mA IOH, 64-mA IOL)
 Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), and Plastic (N) and Ceramic (J) DIPs




Pinout

Connection Diagram


Specifications

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . 0.5 V to 7 V
Input voltage range,  (see Note 1) . . . . . . . . . . . . . .  . . . . . . . . . . . . .. . .. . . . . . . . . . .0.5 V to 7 V
Voltage applied to any output in the high state or power-off state, VO  . . .  . . . . .  . .0.5 V to 5.5 V
Current into any output in the low state, IO: SN54ABT640 . . . . . . . . . . . . .. . . . . . . . . . . . .. . .96 mA 
                                                                       SN74ABT640  . . . . . . . . . . . . . . . . . . . . . . . ..   .128 mA
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . .. .18 mA
Output clamp current, IOK (VO < 0)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 mA
Package thermal impedance, JA (see Note 2): DB package  . . . .  . . . .  . . . . . . . . . . . .   . . .115°C/W
                                                                          DW package  . . . .. . . . .   . . . . . . . . . . . . . . .. .97°C/W
                                                                          N package  . . . .. . . . . . . .  . . . . . . . . . . . . . . . 67°C/W
                                                                          PW package  . . . . . . . . . .  . . . . . . . . . . . . .. .128°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .    . . .. . . .65°C to 150°C  


Description

The SN54ABT640 bus transceivers are designed for asynchronous communication between data buses. SN54ABT640 transmits inverted data from the A bus to the B bus or from the B bus to the A bus, depending on the level at the directioncontrol (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor SN54ABT640 is determined by the current-sinking capability of the driver.

The SN54ABT640 is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74ABT640 is characterized for operation from 40°C to 85°C.




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