Features: • State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation• ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)• Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17• ...
SN54ABT652: Features: • State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation• ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Mod...
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Features: PinoutSpecificationsDescriptionThe SN54/74LS147 and SN54/74LS148 are Priority Encoders. ...
PinoutDescriptionThe LS155 and LS156 are Dual 1-of-4 Decoder/Demultiplexers with common Address in...
SN54ABT652 consists of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Output-enable (OEAB and OEBA) inputs of SN54ABT652 are provided to control the transceiver functions.
Select-control (SAB and SBA) inputs of SN54ABT652 are provided to select whether real-time or stored data is transferred. The circuitry of SN54ABT652 used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. A low input selects real-time data, and a high input selects stored data. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the 4ABT652.