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SN54ABT8543

Features: ` Members of the Texas InstrumentsSCOPEE Family of Testability Products` Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture` Functionally Equivalent to 'F543 and 'ABT543 in the Normal-Function Mode` SCOPEE Instruction Set IEEE Standard 11...

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SeekIC No. : 004496371 Detail

SN54ABT8543: Features: ` Members of the Texas InstrumentsSCOPEE Family of Testability Products` Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture` Functionally ...

SN54ABT8543 Data Sheet

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Part Number:
SN54ABT8543
Supply Ability:
5000

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  • 1~5000
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  • 15 Days
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Product Details

Description



Features:

` Members of the Texas Instruments
SCOPEE Family of Testability Products
` Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture
` Functionally Equivalent to 'F543 and 'ABT543 in the Normal-Function Mode
` SCOPEE Instruction Set
IEEE Standard 1149.1-1990 Required Instructions, Optional INTEST, CLAMP, and HIGHZ
Parallel-Signature Analysis at Inputs With Masking Option
Pseudo-Random Pattern Generation From Outputs
Sample Inputs/Toggle Outputs
Binary Count From Outputs
Even-Parity Opcodes
` Two Boundary-Scan Cells Per I/O for Greater Flexibility
` State-of-the-Art EPIC-II BE BiCMOS Design Significantly Reduces Power Dissipation
` Package Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DL) Packages, Ceramic Chip Carriers (FK), and Standard Ceramic DIPs (JT)


Pinout

Connection Diagram


Specifications

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 7 V
Input voltage range, VI: except I/O ports (see Note 1) . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 7 V 
                                                   I/O ports (see Note 1)  . . . . . . . . . . . . . . . . . . . . .0.5 V to 5.5 V
Voltage range applied to any output in the high state or power-off state, VO  . . . .0.5 V to 5.5 V
Current into any output in the low state, IO:SN54ABT8543  . . . . . . . . . . . . . . . . . . . . . . .  . .96 mA
                                                                       SN74ABT8543  . . . . . . . . . . . . . . . . . . . . . . . .128 mA
Input clamp current, IIK (VI < 0)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 mA
Output clamp current, IOK (VO < 0)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 mA
Maximum power dissipation at TA = 55°C (in still air) (see Note 2): DL package  . . . . . . . . . .0.7 W
                                                                                                           DW package . . . . . . . . . 1.7 W
Storage temperature range, Tstg  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65°C to 150°C


Description

The SN54ABT8543 scan test devices with octal registered bus transceivers are members of the Texas Instruments SCOPETM testability integrated-circuit family. This family of devices supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit-board assemblies. Scan access to the test circuitry of SN54ABT8543 is accomplished via the 4-wire test access port (TAP) interface.

In the normal mode, SN54ABT8543 is functionally equivalent to the 'F543 and 'ABT543 octal registered bus transceivers. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the SN54ABT8543 pins or to perform a self-test on the boundary-test cells. Activating the TAP in normal mode does not affect the functional operation of the SCOPEE octal registered bus transceivers.

Data flow in each direction of SN54ABT8543 is controlled by latch-enable (LEAB and LEBA), chip-enable (CEAB and CEBA), and output-enable (OEAB and OEBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB and CEAB are both low. When either LEAB or CEAB is high, the A data is latched. The B outputs are active when OEAB and CEAB are both low. When either OEAB or CEAB is high, the B outputs are in the high-impedance state. Control for B-to-A data flow is similar to that for A-to-B, but uses LEBA, CEBA, and OEBA.

In the test mode, the normal operation of the SCOPEE SN54ABT8543 registered bus transceiver is inhibited and the test circuitry is enabled to observe and control the I/O boundary of the device. When enabled, the test circuitry of SN54ABT8543 performs boundary-scan test operations as described in IEEE Standard 1149.1-1990.

Four dedicated test pins control the operation of the test circuitry SN54ABT8543: test data input (TDI), test data output (TDO), test mode select (TMS), and test clock (TCK). Additionally, the test circuitry performs other testing functions such as parallel-signature analysis (PSA) on data inputs and pseudo-random pattern generation (PRPG) from data outputs. All testing and scan operations are synchronized to the TAP interface.

The SN54ABT8543 is characterized for operation over the full military temperature range of 55°C to 125°C.

The SN74ABT8543 is characterized for operation from 40°C to 85°C.




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