SN54ACT1284 Selling Leads, Price trend, SN54ACT1284 DataSheet download, circuit diagram from SeekIC.com

Features: · 3-State Outputs Directly Drive Bus Lines· Flow-Through Architecture Optimizes PCB Layout· Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise· ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)· D...

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SeekIC No. : 004496421 Detail

SN54ACT1284: Features: · 3-State Outputs Directly Drive Bus Lines· Flow-Through Architecture Optimizes PCB Layout· Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise· ESD Protection Ex...

SN54ACT1284 Data Sheet

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Part Number:: SN54ACT1284
Supply Ability:: 5000

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Qty
1~5000

Unit Price
Negotiable

Processing time
15 Days

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Product Details

Description

Features:

· 3-State Outputs Directly Drive Bus Lines
· Flow-Through Architecture Optimizes PCB Layout
· Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
· ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
· Designed for the IEEE 1284-I (Level 1 Type)
and IEEE 1284-II (Level 2 Type) Electrical
Specifications
· Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW), and
DIP (N) Packages, Ceramic Chip Carriers
(FK), Flat (W), and DIP (J) Packages

Pinout

Connection Diagram

Specifications

Supply voltage range, V_CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 7 V
B-port input and output voltage range, VI and VO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . 2 V to 7 V
A-port input and output voltage range, VI and VO (see Note 1) . . . . . . . . . . . . . . . . . . . .0.5 V to VCC + 0.5 V
Input clamp current, I_IK(V_I< 0 or V_I > V_CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, I_OK(V_O< 0 or V_O > V_CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous output current, IO (V_O = 0 to V_CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through V_CCor G_ND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA
Package thermal impedance, q_JA (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .115°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .97°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The ac input voltage pulsewidth is limited to 20 ns if the input voltage goes more negative than 0.5 V.
3. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.

Description

The SN54ACT1284 is designed for asynchronous two-way communication between data buses. The control function minimizes external timing requirements.

The SN54ACT1284 allows data transmission in either the A-to-B or the B-to-A direction for bits 1, 2, 3, and 4, depending on the logic level at the direction-control (DIR) input. Bits 5, 6, and 7, however, always transmit in the A-to-B direction.

The output drive for each mode is determined by the high drive (HD) control pin. When HD is high, the high drive is delivered by the totem-pole configuration, and when HD is low, the outputs of SN54ACT1284 are open drain. This meets the drive requirements as specified in the IEEE 1284-I (level 1 type) and the IEEE 1284-II (level 2 type) parallel peripheral-interface specification.

The SN54ACT1284 is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74ACT1284 is characterized for operation from 0°C to 70°C.

SN54ACT1284

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