SN54ACT534

Features: · Inputs Are TTL-Voltage Compatible· 3-State Inverting Outputs Drive Bus Lines Directly· Full Parallel Access for Loading· EPICTM (Enhanced-Performance Implanted CMOS) 1-mm Process· Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outli...

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SeekIC No. : 004496440 Detail

SN54ACT534: Features: · Inputs Are TTL-Voltage Compatible· 3-State Inverting Outputs Drive Bus Lines Directly· Full Parallel Access for Loading· EPICTM (Enhanced-Performance Implanted CMOS) 1-mm Process· Packag...

floor Price/Ceiling Price

Part Number:
SN54ACT534
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/24

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Product Details

Description



Features:

· Inputs Are TTL-Voltage Compatible
· 3-State Inverting Outputs Drive Bus Lines Directly
· Full Parallel Access for Loading
· EPICTM (Enhanced-Performance Implanted CMOS) 1-mm Process
· Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W), and Standard Plastic (N) and Ceramic (J) DIPs




Pinout

  Connection Diagram


Specifications

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA
Package thermal impedance, JA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . 70°C/W
                                                                           DW package . . . . . . . . . . . . . . . . . . . . . 58°C/W
                                                                           N package . . . . . . . . . . . . . .  . . . . . . . . 69°C/W
                                                                           PW package . . . . . . . . . . . . . . . . . . . . . 83°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C

‡ Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51.




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