Features: Inputs Are TTL-Voltage CompatibleLatch-Up Performance Exceeds 250 mA Per JESD 17ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A)SpecificationsSupply voltage range, VCC....................................................................0.5 V t...
SN54AHCT126: Features: Inputs Are TTL-Voltage CompatibleLatch-Up Performance Exceeds 250 mA Per JESD 17ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A)Specifications...
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Features: PinoutSpecificationsDescriptionThe SN54/74LS147 and SN54/74LS148 are Priority Encoders. ...
PinoutDescriptionThe LS155 and LS156 are Dual 1-of-4 Decoder/Demultiplexers with common Address in...
The SN54AHCT126 is quadruple bus buffer gates featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. When OE is high, the respective gate passes the data from the A input to its Y output.
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor SN54AHCT126 is determined by the current-sourcing capability of the driver.