PinoutSpecificationsSupply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 4.6 VInput voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. .0.5 V to 7...
SN54ALVTH16841: PinoutSpecificationsSupply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 4.6 VInput voltage range, VI (see Note 1...
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Features: PinoutSpecificationsDescriptionThe SN54/74LS147 and SN54/74LS148 are Priority Encoders. ...
PinoutDescriptionThe LS155 and LS156 are Dual 1-of-4 Decoder/Demultiplexers with common Address in...

The SN54ALVTH16841 is 20-bit bus-interface D-type latches with 3-state outputs designed for 2.5-V or 3.3-V VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.
The SN54ALVTH16841 features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. SN54ALVTH16841 is particularly suitable for implementing buffer registers, unidirectional bus drivers, and working registers.
The SN54ALVTH16841 can be used as two 10-bit latches or one 20-bit latch. The 20 latches are transparent D-type latches. The SN54ALVTH16841 has noninverting data (D) inputs and provides true data at its outputs. While the latch-enable (1LE or 2LE) input is high, the Q outputs of the corresponding 10-bit latch follow the D inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.
A buffered output-enable (1OE or 2OE) input of SN54ALVTH16841 can be used to place the outputs of the corresponding 10-bit latch in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs of SN54ALVTH16841 neither load nor drive the bus lines significantly.
The output-enable (OE) input of SN54ALVTH16841 does not affect the internal operation of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
Active bus-hold circuitry of SN54ALVTH16841 is provided to hold unused or floating inputs at a valid logic level.
When VCC is between 0 and 1.2 V, the SN54ALVTH16841 is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.2 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor SN54ALVTH16841 is determined by the current-sinking capability of the driver.
The SN54ALVTH16841 is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74ALVTH16841 is characterized for operation from 40°C to 85°C.