Features: • Contain Four Flip-Flops With Double-Rail Outputs• Buffered Clock and Direct Clear Inputs• Applications Include: Buffer/Storage Registers Shift Registers Pattern Generators• Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standa...
SN54F175: Features: • Contain Four Flip-Flops With Double-Rail Outputs• Buffered Clock and Direct Clear Inputs• Applications Include: Buffer/Storage Registers Shift Registers Pattern Generat...
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Features: PinoutSpecificationsDescriptionThe SN54/74LS147 and SN54/74LS148 are Priority Encoders. ...
PinoutDescriptionThe LS155 and LS156 are Dual 1-of-4 Decoder/Demultiplexers with common Address in...

These monolithic, positive-edge-triggered flipflops of SN54F175 utilize TTL circuitry to implement D-type flip-flop logic with a direct clear (CLR) input. Information at the data (D) inputs meeting setup time requirements is transferred to outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D-input signal of SN54F175 has no effect at the output.
The SN54F175 is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74F175 is characterized for operation from 0°C to 70°C.