SN54HC138

The SN54HC138 is designed to be used in high-performance memory-decoding or datarouting applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory SN54HC138 are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible.

The conditions at the binary-select inputs of SN54HC138 at the three enable inputs select one of eight output lines. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one inverter. An enable input of SN54HC138 can be used as a data input for demultiplexing applications.

The SN54HC138 is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74HC138 is characterized for operation from 40°C to 85°C.