Features: 2-V to 6-V VCC Operation ±6-mA Output Drive at 5 VHigh-Current 3-State Parallel Register Low Input Current of 1 A Max Outputs Can Drive Up To 15 LSTTL Loads 8-Bit Counter With RegisterLow Power Consumption, 80-A Max ICC Counter Has Direct ClearTypical tpd = 14 nsApplicationAudi...
SN54HC590A: Features: 2-V to 6-V VCC Operation ±6-mA Output Drive at 5 VHigh-Current 3-State Parallel Register Low Input Current of 1 A Max Outputs Can Drive Up To 15 LSTTL Loads 8-Bit Counter With Regi...
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Features: PinoutSpecificationsDescriptionThe SN54/74LS147 and SN54/74LS148 are Priority Encoders. ...
PinoutDescriptionThe LS155 and LS156 are Dual 1-of-4 Decoder/Demultiplexers with common Address in...

The 'HC590A devices contain an 8-bit binary counter that feeds an 8-bit storage register. The storage register has parallel outputs. Separate clocks are provided for both the binary counter and storage register. The binary counter features direct clear (CCLR) and count-enable (CCKEN) inputs. A ripple-carry output (RCO) is provided for cascading. Expansion is accomplished easily for two stages by connecting RCO of the first stage to CCKEN of the second stage. Cascading for larger count chains HC590A can be accomplished by connecting RCO of each stage to the counter clock (CCLK) input of the following stage.
CCLK and the register HC590A clock (RCLK) inputs are positive-edge triggered. If both clocks are connected together, the counter state always is one count ahead of the register. Internal circuitry prevents clocking from the clock enable.