PinoutSpecificationsSupply voltage range, VCC....................................................................-0.5 V to 7 VInput voltage range, VI(see Note 1) . . . . . . . . . . . . . . . . . . . ............-0.5 V to 7 VVoltage range applied to any output in the high-impedance or power-off s...
SN54LV08A: PinoutSpecificationsSupply voltage range, VCC....................................................................-0.5 V to 7 VInput voltage range, VI(see Note 1) . . . . . . . . . . . . . . . . . . ...
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Features: PinoutSpecificationsDescriptionThe SN54/74LS147 and SN54/74LS148 are Priority Encoders. ...
PinoutDescriptionThe LS155 and LS156 are Dual 1-of-4 Decoder/Demultiplexers with common Address in...

Supply voltage range, VCC....................................................................-0.5 V to 7 V
Input voltage range, VI(see Note 1) . . . . . . . . . . . . . . . . . . . ............-0.5 V to 7 V
Voltage range applied to any output in the high-impedance
or power-off state, VO(see Note 1) . . . . . . . . . . . . . . . . . . . . ..........-0.5 V to 7 V
Output voltage range, VO(see Notes 1 and 2) . . . . . . . . . . . -0.5 V to VCC + 0.5 V
Input clamp current, IIK(V I< 0) . . . . . . . . . . . . . . . . . . . . . . ........................-20 mA
Output clamp current, IOK (V O< 0) . . . . . . . . . . . . . . . . . ............................-50 mA
Continuous output current, IO(V O = 0 to VCC ) . . . . . . . . ............................±25 mA
Continuous current through VCCor GND . . . . . . . . . . . . . ..............................±50 mA
Package thermal impedance,QJA (see Note 3):D package . . . . . . . . . . . . . . . .86/W
(see Note 3):DB package . . . . . . . . . . . . . . .96C/W
(see Note 3):DGV package . . . . . . . . . . . . . 127C/W
(see Note 3):NS package . . . . . . . . . . . . . . .76C/W
(see Note 3):PW package . . . . . . . . . . . . .. 113C/W
(see Note 4):RGY package . . . . . . . . . . . . . .47C/W
Storage temperature range, Tstg. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65 to 150
These quadruple 2-input positive-AND gates are designed for 2-V to 5.5-V VCCoperation. The 'LV08A device perform the Boolean function Y=AB or Y=A+B in positive logic.
LV08A is fully specified for partial-power-down applications using Ioff .The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.