SN54LV125A Selling Leads, Price trend, SN54LV125A DataSheet download, circuit diagram from SeekIC.com

Features: *2-V to 5.5-V VCC Operation* Max tpd of 6 ns at 5 V* Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C* Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C* Support Mixed-Mode Voltage Operation on All Ports* Ioff Supports Partial-Power-Down Mode...

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SeekIC No. : 004497057 Detail

SN54LV125A: Features: *2-V to 5.5-V VCC Operation* Max tpd of 6 ns at 5 V* Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C* Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V,...

SN54LV125A Data Sheet

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Part Number:: SN54LV125A
Supply Ability:: 5000

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Product Details

Description

Features:

* 2-V to 5.5-V VCC Operation
* Max tpd of 6 ns at 5 V
* Typical VOLP (Output Ground Bounce)
   <0.8 V at VCC = 3.3 V, TA = 25°C
* Typical VOHV (Output VOH Undershoot)
   >2.3 V at VCC = 3.3 V, TA = 25°C
* Support Mixed-Mode Voltage Operation on
   All Ports
* Ioff Supports Partial-Power-Down Mode
   Operation
* Latch-Up Performance Exceeds 250 mA Per
   JESD 17
* ESD Protection Exceeds JESD 22
   − 2000-V Human-Body Model (A114-A)
   − 200-V Machine Model (A115-A)
   − 1000-V Charged-Device Model (C101)

Pinout

Connection Diagram

Specifications

Supply voltage range, V_CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .−0.5 V to 7 V
Input voltage range, V_I (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .−0.5 V to 7 V
Voltage range applied to any output in the high-impedance
or power-off state, V_O (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ... . . . . . . . . . . . . . .−0.5 V to 7 V
Output voltage range, V_O (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .−0.5 V to V_CC + 0.5 V
Input clamp current, I_IK (V_I < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . .−20 mA
Output clamp current, I_OK (V_O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . .−50 mA
Continuous output current, I_O (V_O = 0 to V_CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±35 mA
Continuous current through V_CC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±70 mA
Package thermal impedance, _JA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . ... . . .86/W
                                                     (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . .96/W
                                                     (see Note 3): DGV package . . . . . . . . . . . . . . . . . . . . . . . .. . . . .127/W
                                                     (see Note 3): N package . . . . . . . . . . . . . . . . . . . . . . . . . ... . . . . .80/W
                                                     (see Note 3): NS package . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . .76/W
                                                     (see Note 3): PW package . . . . . . . . . . . . . . . . . . . . . . . . . .. . . .113/W
                                                     (see Note 4): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47/W
Storage temperature range, T_stg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. .−65 to 150

Description

The 'LV125A quadruple bus buffer gates are designed for 2-V to 5.5-V VCC operation.

These devices feature independent line drivers with 3-state outputs. Each output of LV125A is disabled when the associated output-enable (OE) input is high.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor LV125A is determined by the current-sinking capability of the driver.

LV125A is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.

SN54LV125A

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