SN54LV164

These 8-bit parallel-out serial shift registers SN54LV164 are designed for 2.7-V to 5.5-V V_CC operation. The 'LV164 feature AND-gated serial (A and B) inputs and an asynchronous clear (CLR) input. The gated serial inputs permit complete control over incoming data as a low at either input inhibits entry of the new data and resets the first flip-flop to the low level at the next clock pulse. A high-level input enables the other input, which then determines the state of the first flip-flop. Data at the serial inputs of SN54LV164 can be changed while the clock is high or low, provided the minimum setup time requirements are met. Clocking occurs on the low-to-high-level transition of the clock (CLK) input.

The SN74LV164 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area. The SN54LV164 is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74LV164 is characterized for operation from 40°C to 85°C.