SN54LV374

These octal edge-triggered D-type flip-flops of SN54LV374 are designed for 2.7-V to 5.5-V V_CC operation. The 'LV374 feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. SN54LV374 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs. A buffered output-enable (OE) input of SN54LV374 can be used to place the eight outputs in either as normal logic state (high or low logic levels) or high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components. OE does not affect internal operations of the latch. Old data of SN54LV374 can be retained or new data can be entered while the outputs are in the high-impedance state.

The SN74LV374 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area. The SN54LV374 is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74LV374 is characterized for operation from 40°C to 85°C.