SN54LV4052A

Features:

 2-V to 5.5-V V_CC Operation
 Support Mixed-Mode Voltage Operation on All Ports
 Fast Switching
 High On-Off Output-Voltage Ratio
 Low Crosstalk Between Switches
 Extremely Low Input Current
 Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
 ESD Protection Exceeds JESD 22
   − 2000-V Human-Body Model (A114-A)
   − 200-V Machine Model (A115-A)
   − 1000-V Charged-Device Model (C101)


Application




Specifications

Supply voltage range, V^_CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7.0 V
Input voltage range, V^_I (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7.0 V
Switch I/O voltage range, V_IO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V_CC + 0.5 V
Input clamp current, I_IK (V_I < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA
I/O diode current, I_IOK (V_IO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. −50 mA
Switch through current, I_T (V_IO = 0 to V_CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through V_CC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ±50 mA
Package thermal impedance, JA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . 73°C/W
                                                     (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W
                                                     (see Note 3): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W
                                                     (see Note 3): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
                                                     (see Note 3): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
                                                     (see Note 3): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  108°C/W
                                                     (see Note 4): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  −65°C to 150°C
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
             2. This value is limited to 5.5 V maximum.
             3. The package thermal impedance is calculated in accordance with JESD 51-7.
             4. The package thermal impedance is calculated in accordance with JESD 51-5.



Description

These dual 4-channel CMOS analog multiplexers/demultiplexers are designed for 2-V to 5.5-V V^_CC operation.

The 'LV4052A devices handle both analog and digital signals. Each channel permits signals with amplitudes up to 5.5 V (peak) to be transmitted in either direction.

LV4052A applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-toanalog conversion systems.