PinoutSpecificationsSupply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 6.5 VInput voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 6.5 V Voltage range applie...
SN54LVC646A: PinoutSpecificationsSupply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 6.5 VInput voltage range, VI (see Note 1) . . . . . ...
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Features: PinoutSpecificationsDescriptionThe SN54/74LS147 and SN54/74LS148 are Priority Encoders. ...
PinoutDescriptionThe LS155 and LS156 are Dual 1-of-4 Decoder/Demultiplexers with common Address in...

The SN54LVC646A octal bus transceiver and register is designed for 2.7-V to 3.6-V VCC operation and the SN74LVC646A octal bus transceiver and register is designed for 1.65-V to 3.6-V VCC operation.
SN54LVC646A consists of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that are performed with the 'LVC646A.
Output-enable (OE) and direction-control (DIR) inputs of SN54LVC646A control the transceiver functions. In the transceiver mode, data present at the high-impedance port is stored in either register or in both.
The select-control (SAB and SBA) inputs of SN54LVC646A can multiplex stored and real-time (transparent mode) data. DIR determines which bus receives data when OE is low. In the isolation mode (OE high), A data is stored in one register and B data can be stored in the other register.
When an output function of SN54LVC646A is disabled, the input function is still enabled and can be used to store and transmit data. Only one of the two buses, A or B, can be driven at a time.