Features: EPICTM(Enhanced-Performance Implanted CMOS) Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 250 mA Per JESD 17 Typical VOLP(Output Ground Bounce) < 0.8 V at VCC= 3.3 V, TA...
SN54LVC86A: Features: EPICTM(Enhanced-Performance Implanted CMOS) Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Pe...
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Features: PinoutSpecificationsDescriptionThe SN54/74LS147 and SN54/74LS148 are Priority Encoders. ...
PinoutDescriptionThe LS155 and LS156 are Dual 1-of-4 Decoder/Demultiplexers with common Address in...

The SN54LVC86A quadruple 2-input exclusive-OR gate is designed for 2.7-V to 3.6-V VCC operation and the SN74LVC86A quadruple 2-input exclusive-OR gate is designed for 1.65-V to 3.6-V VCC operation.
The 'LVC86A devices perform the Boolean function Y = A B or Y = A B + A B in positive logic.
A common application of SN54LVC86A is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output.
Inputs of SN54LVC86A can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.
The SN54LVC86A is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74LVC86A is characterized for operation from 40°C to 85°C.