SN54LVCH245A Selling Leads, Price trend, SN54LVCH245A DataSheet download, circuit diagram from SeekIC.com

Features: *EPICE (Enhanced-Performance Implanted CMOS) Submicron Process* Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25* Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25* Power Off Disables Outputs, Permitting Live Insertion* ESD Protection Exceeds 200...

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SeekIC No. : 004497142 Detail

SN54LVCH245A: Features: *EPICE (Enhanced-Performance Implanted CMOS) Submicron Process* Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25* Typical VOHV (Output VOH Undershoot) > 2 V at VCC...

SN54LVCH245A Data Sheet

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Part Number:: SN54LVCH245A
Supply Ability:: 5000

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1~5000

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Product Details

Description

Features:

* EPICE (Enhanced-Performance Implanted
   CMOS) Submicron Process
* Typical V_OLP (Output Ground Bounce)
   < 0.8 V at V_CC = 3.3 V, T_A = 25
* Typical V_OHV (Output VOH Undershoot)
   > 2 V at V_CC = 3.3 V, T_A = 25
* Power Off Disables Outputs, Permitting
   Live Insertion
* ESD Protection Exceeds 2000 V Per
   MIL-STD-883, Method 3015; Exceeds 200 V
   Using Machine Model (C = 200 pF, R = 0)
* Latch-Up Performance Exceeds 250 mA Per
   JESD 17
* Support Mixed-Mode Signal Operation on
   All Ports (5-V Input/Output Voltage With
   3.3-V V_CC)
* Bus Hold on Data Inputs Eliminates the
   Need for External Pullup/Pulldown
   Resistors
* Package Options Include Plastic
   Small-Outline (DW), Shrink Small-Outline
   (DB), and Thin Shrink Small-Outline (PW)
   Packages, Ceramic Flat (W) Package,
   Ceramic Chip Carriers (FK), and DIPs (J)

Pinout

Connection Diagram

Specifications

Supply voltage range, V_CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 6.5 V
Input voltage range, V_I: (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 6.5 V
Voltage range applied to any output in the high-impedance or power-off state, V_O
   (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 6.5 V
Voltage range applied to any output in the high or low state, V_O
   (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to VCC + 0.5 V
Input clamp current, I_IK(V_I < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 mA
Output clamp current, I_OK (V_O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ... . . . . . . . .50 mA
Continuous output current, I_O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±50 mA
Continuous current through V_CC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±100 mA
Package thermal impedance, _JA (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . ... . . .115/W
                                                                           DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .97/W
                                                                           PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .128/W
Storage temperature range, T_stg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . .65 to 150

Description

The SN54LVCH245A octal bus transceiver is designed for 2.7-V to 3.6-V V_CC operation and the SN74LVCH245A octal bus transceiver is designed for 1.65-V to 3.6-V V_CC operation.

SN54LVCH245A is designed for asynchronous communication between data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are effectively isolated.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of SN54LVCH245A as translators in a mixed 3.3-V/5-V system environment.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor SN54LVCH245A is determined by the current-sinking capability of the driver.

Active bus-hold circuitry of SN54LVCH245A is provided to hold unused or floating data inputs at a valid logic level.

The SN54LVCH245A is characterized for operation over the full military temperature range of 55 to 125. The SN74LVCH245A is characterized for operation from 40 to 85.

SN54LVCH245A

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