SN65LV1224

V_CC to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . . . −0.3 V to 4 V
LVTTL input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . −0.3 V to (V_CC + 0.3 V)
LVTTL output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . −0.3 V to (V_CC + 0.3 V)
LVDS receiver input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 3.9 V
LVDS driver output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . −0.3 V to 3.9 V
LVDS output short circuit duration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 ms
Electrostatic discharge: HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . up to 6 kV
                                     MM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . up to 200 V
Junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. − 65°C to 150°C
Lead temperature (soldering, 4 seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . 260°C
Maximum package power dissipation, T_A = 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . 1.27 W
Package derating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10.3 mW/°C above 25°C

† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

The SN65LV1023 serializer and SN65LV1224 deserializer comprise a 10-bit serdes chipset designed to transmit and receive serial data over LVDS differential backplanes at equivalent parallel word rates from 30 MHz to 66 MHz. Including overhead, SN65LV1224 translates into a serial data rate between 360-Mbps and 792-Mbps payload encoded throughput.

Upon power up, the chipset link can be initialized via a synchronization mode with internally generated SYNC patterns, or the deserializer SN65LV1224 can be allowed to synchronize to random data. By using the synchronization mode, the deserializer SN65LV1224 establishes lock within specified, shorter time parameters.

The SN65LV1224 can be entered into a power-down state when no data transfer is required. Alternatively, a mode is available to place the output pins in the high-impedance state without losing PLL lock.

The SN65LV1023 and SN65LV1224 are characterized for operation over ambient air temperature of 40°C to 85°C.