SN65LVP20

` Low-Voltage PECL Input and Low-Voltage PECL or LVDS Outputs
` Signaling Rates to 4 Gbps or Clock Rates to 2 GHz
- 120-ps Output Transition Times
- Less than 45 ps Total Jitter
- Less than 630 ps Propagation Delay Times
` 2.5-V or 3.3-V Supply Operation
` 2-mm x 2-mm Small-Outline No-Lead Package

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential voltages, are with respect to network ground (see Figure 2).
(3) Tested in accordance with JEDEC Standard 22, Test Method A114-A-7
(4) Tested in accordance with JEDEC Standard 22, Test Method C101

The SN65LVDS20 and SN65LVP20 are a high-speed differential receiver and driver connected as a repeater. The receiver accepts low-voltage positive-emitter-coupled logic (PECL) at signaling rates up to 4 Gbps and repeats it as either an LVDS or PECL output signal. The signal path through the SN65LVDS20 and SN65LVP20 is differential for low radiated emissions and minimal added jitter.

The outputs of the SN65LVDS20 are LVDS levels as defined by TIA/EIA-644-A. The outputs of the SN65LVDP20 are compatible with low-voltage PECL levels. A low-level input to EN enables the outputs. A high-level input puts the output into a high-impedance state. Both outputs of SN65LVDS20 and SN65LVP20 are designed to drive differential transmission lines with nominally 100-W characteristic impedance.

Both SN65LVDS20 and SN65LVP20 provide a voltage reference (V_BB) of typically 1.35 V below V_CC for use in receiving single-ended PECL input signals. When not used, VBB should be unconnected or open.

SN65LVDS20 and SN65LVP20 are characterized for operation from -40°C to 85°C.