Features: * Quad Bus Buffers* 3-State Outputs* Separate Control for Each ChannelPinoutSpecificationsSupply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . .7 VInput voltage, VI . . . . . . . . . . . . . . . . ...
SN74126: Features: * Quad Bus Buffers* 3-State Outputs* Separate Control for Each ChannelPinoutSpecificationsSupply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ....
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These '125 and 'LS125A bus buffers feature three-state outputs that, when enabled, have the low impedance characteristics of a TTL output with additional drive capability at high logic levels to permit driving heavily loaded bus lines without external pullup resistors. When disabled, both output transistors are turned off, presenting a high-impedance state to the bus so the output will act neither as a significant load nor as a driver. The '125 and 'LS125A devices' outputs are disabled when G is high. The '126 and 'LS126A devices' outputs are disabled when G is low.