SN74ABT162500

Pinout




Specifications

Supply voltage range, V_CC  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..0.5 V to 7 V
Input voltage range, V_I (except I/O ports) (see Note 1)  . . . .  . . . . . . . 0.5 V to 7 V
Voltage range applied to any output in the high or power-off state, V_O . . . .  . . . . . .
                                                                       . . . .  . . . . . . .. . . .  . . .  0.5 V to 5.5 V

Current into any output in the low state, I_O : SN54ABT162500 (A port). . . .  . .  96mA
                                                                        SN74ABT162500 (A port)  . . .. .  128mA
                                                                        B port   . . . . . . . . . . . . . . . . . . . .  30mA
Input clamp current, I_IK  (V_I < 0)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18mA 
Output clamp current, I_OK  (V_O < 0)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50mA 
Package thermal impedance, JA (see Note 2): DL package  . . . . . .. . .  . . . . . 74/W
Storage temperature range, T_stg. . . . . . . . .. . .  . . . . . . . . . . . . . . . . .. 65 to150


Description

These SN74ABT162500 18-bit universal bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes.Data flow in each direction is controlled by output-enable (OEAB and OEAB ), latch-enable
(LEAB and LEBA), and clock (CLKAB and CLKAB ) inputs.

For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the high-to-low transition of CLKAB . Output-enable OEAB is active high. When OEAB is high, the outputs of SN74ABT162500 are active. When OEAB is low, the outputs are in the high-impedance state.