SN74ABT162601

Pinout




Specifications

Supply voltage range, V_CC  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..0.5 V to 7 V
Input voltage range, V_I (except I/O ports) (see Note 1)  . . . .  . . . . . . . 0.5 V to 7 V
Voltage range applied to any output in the high or power-off state, V_O . . . .  . . . . . .
                                                                       . . . .  . . . . . . .. . . .  . . .  0.5 V to 5.5 V

Current into any output in the low state, I_O : SN54ABT162601 (A port). . . .  . .  96mA
                                                                        SN74ABT162601 (A port)  . . .. .  128mA
                                                                        B port   . . . . . . . . . . . . . . . . . . . .  30mA
Input clamp current, I_IK  (V_I < 0)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18mA 
Output clamp current, I_OK  (V_O < 0)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50mA 
Package thermal impedance, JA (see Note 2): DGG package    . . . . . . . . . . . . 81°C/W
                                                                         DL package. . . . . . . . . . . . . . . 74°C/W
Storage temperature range, T_stg. . . . . . . . .. . .  . . . . . . . . . . . . . . . . .. 65 to150


Description

These SN74ABT162601 18-bit universal bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes.

Data flow in each direction is controlled by output-enable (OEAB and OEBA ), latch-enable (LEAB and LEBA ), and clock (CLKAB and CLKBA) inputs. The SN74ABT162601 clock can be controlled by the clock-enable (CLKENAB and CLKENBA) inputs.