SN74ABT162841

Pinout




Specifications

Supply voltage range, V_CC  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..0.5 V to 7 V
Input voltage range, V_I (except I/O ports) (see Note 1)  . . . .  . . . . . . . 0.5 V to 7 V
Voltage range applied to any output in the high or power-off state, V_O . . . .  . . . . . .
                                                                       . . . .  . . . . . . .. . . .  . . .  0.5 V to 5.5 V
Current into any output in the low state, I_O :  . . .  . . . . . . .. . . .  . . . . . .. . .  . . 30 mA
Input clamp current, I_IK  (V_I < 0)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18mA 
Output clamp current, I_OK  (V_O < 0)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50mA 
Package thermal impedance, JA (see Note 2): DGG package  . . . . .  . .  . . . . . 86/W
                                                                          DL package  . . .. . . . . . . . . . .  74/W
Storage temperature range, T_stg. . . . . . . . .. . .  . . . . . . . . . . . . . . . . .. 65 to150 


Description

These 'ABT162841  20-bit transparent D-type latches feature noninverting 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O
ports, bidirectional bus drivers, and working registers.

The 'ABT162841 can be used as two 10-bit latches or one 20-bit latch. While the latch-enable (1LE or 2LE) input is high, the Q outputs of the corresponding 10-bit latch follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.