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SN74ABT16540A

Features: Members of the Texas Instruments WidebusTM FamilyState-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power DissipationLatch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17Typical VOLP (Output Ground Bounce)< 1 V at VCC = 5 V, TA = 25 CDistributed VCC and GND Pin ...

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SN74ABT16540A: Features: Members of the Texas Instruments WidebusTM FamilyState-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power DissipationLatch-Up Performance Exceeds 500 mA Per JEDEC Standard JE...

SN74ABT16540A Data Sheet

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Part Number:
SN74ABT16540A
Supply Ability:
5000

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Product Details

Description



Features:

Members of the Texas Instruments WidebusTM Family
State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation
Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
Typical VOLP  (Output Ground Bounce)< 1 V at VCC  = 5 V, TA  = 25 C
Distributed VCC  and GND Pin Configuration Minimizes High-Speed Switching Noise
Flow-Through Architecture Optimizes PCBLayout
High-Drive Outputs (32-mA IOH , 64-mA IOL )
Package Options Include Plastic 300-mil Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG), and Thin Very Small-Outline (DGV) Packages, and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings


Pinout

Connection Diagram


Specifications

Supply voltage range, VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
Voltage range applied to any output in the high or power-off state, VO . . . . . . . . . . . . . . . . . . . . .0.5 V to 5.5 V
Current into any output in the low state, IO : SN54ABT16540 96 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
SN74ABT16540A 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . ... .... .... .... .... .... .... .... .... .... .... .... .... .... ...128 mA
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 mA
Package thermal impedance, q JA (see Note 2): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. .. .. . 89/W
                                                                           DGV package . . . . . . . . . .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..    93/W
                                                                           DL package  . . . . . . . . . . . . . .. .. .. .. .. .. .. .. .. .. .. .. .... .... .94/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 to 150



Description

The SN54ABT16540 and SN74ABT16540A are inverting 16-bit buffers/drivers composed of two 8-bit sections with separate output-enable gates. These buffers and bus drivers provide a high-performance bus interface for wide data paths.

The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1 or OE2) input is high, all corresponding outputs of SN54ABT16540 and SN74ABT16540A  are in the high-impedance state.

To ensure the high-impedance state of SN54ABT16540 and SN74ABT16540A  during power up or power down, OE should be tied to VCC  through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.The SN54ABT16540 is characterized for operation over the full military temperature range of 55 to 125. The SN74ABT16540A is characterized for operation from 40 to 85.




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