SN74ABT18502

Features: • Members of the Texas Instruments SCOPETM Family of Testability Products• Members of the Texas Instruments WidebusTM Family• Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture• UBTTM (Universal Bus Transceiver) Co...

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SeekIC No. : 004497742 Detail

SN74ABT18502: Features: • Members of the Texas Instruments SCOPETM Family of Testability Products• Members of the Texas Instruments WidebusTM Family• Compatible With the IEEE Standard 1149.1-199...

floor Price/Ceiling Price

Part Number:
SN74ABT18502
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/24

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Product Details

Description



Features:

• Members of the Texas Instruments SCOPETM Family of Testability Products
• Members of the Texas Instruments WidebusTM Family
• Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture
• UBTTM (Universal Bus Transceiver) Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Mode
• Two Boundary-Scan Cells per I/O for Greater Flexibility
• State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation
• SCOPETM Instruction Set
   IEEE Standard 1149.1-1990 Required Instructions, Optional INTEST, and P1149.1A CLAMP and HIGHZ
   Parallel Signature Analysis at Inputs With Masking Option
   Pseudo-Random Pattern Generation From Outputs
   Sample Inputs/Toggle Outputs
   Binary Count From Outputs
   Device Identification
   Even-Parity Opcodes
• Packaged in 64-Pin Plastic Thin Quad Flat Pack Using 0.5-mm Center-to-Center Spacings and 68-Pin Ceramic Quad Flat Pack Using 25-mil Center-to-Center Spacings




Application

  Connection Diagram


Specifications

Supply voltage range, VCC  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . .0.5 V to 7 V
Input voltage range, VI (except I/O ports) (see Note 1)  . . . . . . . . . . . . . . . . . . . .. . . . . . . . .0.5 V to 7 V
Input voltage range, VI (I/O ports) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 5.5 V
Voltage range applied to any output in the high state or power-off state, VO  . . . . . . . . . .0.5 V to 5.5 V
Current into any output in the low state, IO: SN54ABT18502  . . . . . . . . . . . . . . .. . . . . . . . . . . . . . .96 mA
                                                                       SN74ABT18502 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .128 mA
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . .50 mA
Continuous current through VCC  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .576 mA
Continuous current through GND  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . . . . . . . . . .1152 mA
Maximum power dissipation at TA = 55°C (in still air) (see Note 2)  . . . . . . . . . . . . . . . . . . . . . . . . .885 mW
Storage temperature range  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . . . . . .65°C to 150°C



Description

The SN54ABT18502 and SN74ABT18502 scan test devices with 18-bit universal bus transceivers are members of the Texas Instruments SCOPETM testability IC family. This SN54ABT18502 and SN74ABT18502  supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface.

In the normal mode, these SN54ABT18502 and SN74ABT18502  devices are 18-bit universal bus transceivers that combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, or clocked modes. They can be used either as two 9-bit transceivers or one 18-bit transceiver. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device pins or to perform a self test on the boundary test cells. Activating the TAP in the normal mode does not affect the functional operation of the SCOPETM universal bus transceivers.

Data flow in each direction of SN54ABT18502 and SN74ABT18502   is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A-bus data is latched while CLKAB is held at a static low or high logic level. Otherwise, if LEAB is low, A-bus data is stored on a low-to-high transition of CLKAB. When OEAB is low, the B outputs are active. When OEAB is high, the B outputs are in the high-impedance state. B-to-A data flow is similar to A-to-B data flow but uses the OEBA, LEBA, and CLKBA inputs.

In the test mode, the normal operation of the  SN54ABT18502 and SN74ABT18502  SCOPEE universal bus transceivers is inhibited, and the test circuitry is enabled to observe and control the I/O boundary of the device. When enabled, the test circuitry performs boundary scan test operations according to the protocol described in IEEE Standard 1149.1-1990.




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