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SN74ABT2952

Features: • State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation• ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)• Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17•...

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SeekIC No. : 004497763 Detail

SN74ABT2952: Features: • State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation• ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine M...

SN74ABT2952 Data Sheet

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Part Number:
SN74ABT2952
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation
• ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
• Two 8-Bit Back-to-Back Registers Store Data Flowing in Both Directions
• Noninverting Outputs
• Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
• Package Options Include Plastic Small-Outline (SOIC) and Shrink Small-Outline (SSOP) Packages, Ceramic Chip Carriers, and Plastic and Ceramic DIPs




Pinout

Connection Diagram


Specifications

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . 0.5 V to 7 V
Input voltage range,  VI (except I/O ports) (see Note 1).  . . . . . . . . . . . . .. . ..   . . . . . .0.5 V to 7 V
Voltage applied to any output in the high state or power-off state, VO  . . .  . . . . .  . .0.5 V to 5.5 V
Current into any output in the low state, IO: SN54ABT2952 . . . . . . . . . . . . .. . . . . . . . . . . . .. . .96 mA 
                                                                       SN74ABT2952 . . . . . . . . . . . . . . . . . . . . . . . ..   .128 mA
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . .. .18 mA
Output clamp current, IOK (VO < 0)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 mA
Maximum power dissipation at TA = 55°C (in still air):DB package  . . . .  . .  . . . . . . . . . .. . .   . . .0.7W
                                                                                    DW package  . . . . . . . . . . . . . . . . . . . . . . .  1 W
                                                                                    NT package  . . . .. .. . . . . . . . . . . . . . .  .   1.3 W
Storage temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .    . . .. . . .65°C to 150°C 


Description

The SN74ABT2952 consists of two 8-bit back-to-back registers that store data flowing in both directions between two bidirectional buses. Data on the A or B bus is stored in the registers on the low-to-high transition of the clock (CLKAB or CLKBA) input provided that the clock-enable (CLKENAB or CLKENBA) input is low. Taking the output-enable (OEAB or OEBA) input low accesses the data on either port.

To ensure the high-impedance state of SN74ABT2952 during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74ABT2952 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.

The SN54ABT2952 is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74ABT2952 is characterized for operation from 40°C to 85°C.




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