SN74ABT374A General Description
These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The eight flip-flops of the SN54ABT374 and SN74ABT374A are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.
SN74ABT374A Maximum Ratings
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V
Voltage range applied to any output in the high or power-off state, VO . . . . . . . . . .
. . . . . . . . . . . . . . . . -0.5 V to 5.5 V
Current into any output in the low state, IO : SN54ABT374 . . . . . . . . . . . .. . .96 mA
SN74ABT374A . . . . . . .. .. . . . 128 mA
Input clamp current, IIK (VI< 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-18 mA
Output clamp current, IOK(VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-50 mA
Package thermal impedance, q JA (see Note 2): DB package . . . . . . . .. . 115°C/W
DW package . . . . . . . . . . 97°C/W
N package . . . . . . . . . . . . 67°C/W
PW package . . . . . . . . . 128°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . .. . . . . . . . . . . .-65 to 150
SN74ABT374A Connection Diagram
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