Position: Home  > All Categories> Integrated Circuits (ICs) > SN74ABT821

SN74ABT821

Features: • State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation• ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015• Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17• Typical VOLP (Output Ground Bounce) < 1 V at VCC =...

product image

SN74ABT821 Picture
See larger image
SeekIC No. : 004497830 Detail

SN74ABT821: Features: • State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation• ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015• Latch-Up Performance Ex...

SN74ABT821 Data Sheet

floor Price/Ceiling Price

Get Latest Price
Part Number:
SN74ABT821
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

SeekIC Buyer Protection PLUS - newly updated for 2013!

  • Escrow Protection.
  • Guaranteed refunds.
  • Secure payments.
  • Learn more >>

Month Sales

268 Transactions

Rating

evaluate  (4.8 stars)

Upload time: 2025/12/24

add to my favourite

Payment Methods

All payment methods are secure and covered by SeekIC Buyer Protection PLUS.

Notice: When you place an order, your payment is made to SeekIC and not to your seller. SeekIC only pays the seller after confirming you have received your order. We will also never share your payment details with your seller.
Product Details

Description



Features:

• State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation
• ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015
• Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
• Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
• High-Drive Outputs (32-mA IOH, 64-mA IOL)
• Package Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DB) Packages, Ceramic Chip Carriers (FK), and Plastic (NT) and Ceramic (JT) DIPs




Pinout

Connection Diagram


Specifications

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . 0.5 V to 7 V
Input voltage range,  (see Note 1) . . . . . . . . . . . . . .  . . . . . . . . . . . . .. . .. . . . . . . . . . .0.5 V to 7 V
Voltage applied to any output in the high state or power-off state, VO  . . .  . . . . .  . .0.5 V to 5.5 V
Current into any output in the low state, IO: SN54ABT821 . . . . . . . . . . . . .. . . . . . . . . . . . .. . .96 mA 
                                                                       SN74ABT821  . . . . . . . . . . . . . . . . . . . . . . . ..   .128 mA
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . .. .18 mA
Output clamp current, IOK (VO < 0)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 mA
Maximum power dissipation at TA = 55°C (in still air) (see Note 2): DB package  . . . .  . .  . . . . 0.65W
                                                                                                         DW package  . . . . . . . . . .. .1.7 W
                                                                                                         N package  . . . .. .. . . . . .   . 1.3 W
Storage temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .    . . .. . . .65°C to 150°C 


Description

These SN74ABT821 10-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. SN74ABT821 are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers. The ten flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs.

A buffered output-enable (OE) input of SN74ABT821 can be used to place the ten outputs in either a normal logic state (high or low level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.

OE does not affect the internal operations of the latch. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state of SN74ABT821 during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74ABT821 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.

The SN54ABT821 is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74ABT821 is characterized for operation from 40°C to 85°C.




Customers Who Bought This Item Also Bought

Margin,quality,low-cost products with low minimum orders. Secure your online payments with SeekIC Buyer Protection.
You may also be interested in :
Connectors, Interconnects
ASP-134488-01
WM4078-ND
RF and RFID
X3C26P1-30S
1P620S
Test Equipment
TOP853
TOP2005
Soldering, Desoldering, Rework Products
TGK-900M-B
TGK-900M-1.6D
Memory Cards, Modules
WT32
VTL5C7
Motors, Solenoids, Driver Boards/Modules
IHSS57-36-20
ASD-B2-1521-B
View more