Features: • State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation• ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)• Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17•...
SN74ABT841: Features: • State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation• ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine M...
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The 4ABT841 10-bit latches are designed specifically for driving highly capacitive or relatively low-impedance loads. 4ABT841 are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The ten latches are transparent D-type latches. The device has noninverting data (D) inputs and provides true data at its outputs.
A buffered output-enable (OE) input of 4ABT841 can be used to place the ten outputs in either a normal logic state (high or low levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.
OE does not affect the internal operations of the 4ABT841 latch. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state.
To ensure the high-impedance state of 4ABT841 during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.The SN74ABT841 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.The SN54ABT841 is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74ABT841 is characterized for operation from 40°C to 85°C.