SN74AC563PWLE

The SN74AC563PWLE is octal D-type transparent latches with 3-state outputs. When the latch-enable (LE) input is high, the Q outputs follow the complements of the data (D) inputs. The features of the SN74AC563PWLE are: (1)3-State Inverting Outputs Drive Bus Lines Directly; (2)Full Parallel Access for Loading; (3)Flow-Through Architecture to Optimize PCB Layout; (4)EPICTM (Enhanced-Performance Implanted CMOS) 1-m Process; (5)Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), Ceramic Chip Carriers (FK) and Flatpacks (W), and Standard Plastic (N) and Ceramic (J) DIPs.

The following is about the absolute maximum ratings of SN74AC563PWLE: (1)Supply voltage range, VCC: 0.5 V to 7 V ; (2)Input voltage range, VI: 0.5 V to VCC + 0.5 V ; (3)Output voltage range, VO: 0.5 V to VCC + 0.5 V ; (4)Input clamp current, IIK (VI < 0 or VI > VCC): ±20 mA ; (5)Output clamp current, IOK (VO < 0 or VO > VCC): ±20 mA; (6)Continuous output current, IO (VO = 0 to VCC): ±50 mA; (7)Continuous current through VCC or GND: ±200 mA ; (8)Maximum power dissipation at TA = 55°C (in still air): DB package 0.6 W, DW package 1.6W, N package 1.3 W, PW package 0.7W; (9)Storage temperature range,Tstg: 65°C to 150°C.

The electrical characteristics of the SN74AC563PWLE are: (1)VOH: 2.9V min at IOH=-50A, VCC=3V; (2)VOL: 0.1V max at IOL=50A, VCC=3V; (3)II: ±1A max at VI=VCC or GND, VCC=5.5V; (4)IOZ: ±5A max at VO=VCC or GND, VCC=5.5V; (5)ICC: 80A max at VI=VCC or GND, IO=0, VCC=5.5V; (6)Ci: 4.5pF max at VCC=5V.