Position: Home  > All Categories> Integrated Circuits (ICs) > SN74AHCT373PWLE

SN74AHCT373PWLE

Features: ` Inputs Are TTL-Voltage Compatible` Latch-Up Performance Exceeds 250 mA Per JESD 17` ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)PinoutSpecificationsSupply voltage range, VCC . . . . . . . . . . . . . ...

product image

SN74AHCT373PWLE Picture
See larger image
SeekIC No. : 004498043 Detail

SN74AHCT373PWLE: Features: ` Inputs Are TTL-Voltage Compatible` Latch-Up Performance Exceeds 250 mA Per JESD 17` ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V...

SN74AHCT373PWLE Data Sheet

floor Price/Ceiling Price

Get Latest Price
Part Number:
SN74AHCT373PWLE
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

SeekIC Buyer Protection PLUS - newly updated for 2013!

  • Escrow Protection.
  • Guaranteed refunds.
  • Secure payments.
  • Learn more >>

Month Sales

268 Transactions

Rating

evaluate  (4.8 stars)

Upload time: 2025/12/24

add to my favourite

Payment Methods

All payment methods are secure and covered by SeekIC Buyer Protection PLUS.

Notice: When you place an order, your payment is made to SeekIC and not to your seller. SeekIC only pays the seller after confirming you have received your order. We will also never share your payment details with your seller.
Product Details

Description



Features:

` Inputs Are TTL-Voltage Compatible
` Latch-Up Performance Exceeds 250 mA Per JESD 17
` ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)


Pinout

Connection Diagram


Specifications

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . 0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . .. 0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±75 mA
Package thermal impedance, JA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . 70/W
                                                                         DGV package . . . . . . . . . . . . . .. . . . . . 92/W
                                                                         DW package . . . . . . . . . . . . . . . . . . . . 58/W
                                                                          N package . . . . . . . . . . . . . . . . . . . . . 69/W
                                                                          NS package . . . . . . . . . . . . . . . . . . . . 60/W
                                                                          PW package . . . . . . . . . . . . . . . . . . . .83/W
Storage temperature range, Tstg  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65to 150
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.


Description

The 'AHCT373 devices are octal-transparent D-type latches. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive of  'AHCT373  provide the capability to drive bus lines without interface or pullup components.OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

To ensure the high-impedance state of  'AHCT373  during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.




Customers Who Bought This Item Also Bought

Margin,quality,low-cost products with low minimum orders. Secure your online payments with SeekIC Buyer Protection.
You may also be interested in :
Undefined Category
VI-B63-IU
X27 589
Resistors
A101G
3006P-1-205LF
Circuit Protection
A50QS75-4Y
F-17*77
Programmers, Development Systems
ARDUINO IIC/I2C 液晶模块
JTAG-SMT2
Audio Products
HUC1002
WM-64CT
Potentiometers, Variable Resistors
RV24YN
WXD4-23-3W
View more