Features: Independent Asynchronous Inputs and Outputs64 Words by 9 BitsData Rates From 0 to 40 MHzFall-Through Time . . . 20 ns Typical3-State OutputsPinoutSpecificationsSupply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 V Input volt...
SN74ALS2233A: Features: Independent Asynchronous Inputs and Outputs64 Words by 9 BitsData Rates From 0 to 40 MHzFall-Through Time . . . 20 ns Typical3-State OutputsPinoutSpecificationsSupply voltage, VCC (see Not...
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This 576-bit memory uses advanced low-power Schottky IMPACT-X E technology and features high speed and fast fall-through times. SN74ALS2233A is organized as 64 words by 9 bits.
A FIFO memory is a storage device that allows data to be written into and read from its array at independent data rates. The function of SN74ALS2233A is used as a buffer to couple two buses operating at different clock rates. This FIFO is designed to process data at rates from 0 to 40 MHz in a bit-parallel format, word by word.
Data is written into memory on a low-to-high transition of the load clock (LDCK) input and is read out on a low-to-high transition of the unload clock (UNCK) input. The SN74ALS2233A memory is full when the number of words clocked in exceeds by 64 the number of words clocked out. When the memory is full, LDCK signals have no effect on the data residing in memory. When the the memory is empty, UNCK signals have no effect.
Status of the FIFO memory is monitored by the FULL, EMPTY, almost-full/almost-empty (AF/AE), and half-full (HF) output flags. The FULL output of SN74ALS2233A is low when the memory is full and high when the memory is not full. The EMPTY output is low when the memory is empty, and high when it is not empty. The AF/AE flag is high when the FIFO contains eight or less words or 56 or more words. The AF/AE flag is low when the FIFO contains between nine and 55 words. The HF flag is high when the FIFO contains 32 or more words and is low when the FIFO contains 31 words or less.
A low level on the reset (RST) input resets the internal stack control pointers and also sets EMPTY low and FULL high. The outputs are not reset to any specific logic levels. The first low-to-high transition on LDCK, either after a RST pulse or from an empty condition, causes EMPTY to go high and the data to appear on the Q outputs. The first word does not have to be unloaded. Data outputs are noninverting with respect to the data inputs and are at a high-impedance state when the output-enable (OE) input is low. The OE input does not effect either the FULL or EMPTY output flags. Cascading is easily accomplished in the word-width direction, but is not possible in the word-depth direction.The SN74ALS2233A is characterized for operation from 0°C to 70°C.