SN74ALS235

The SN74ALS235 is a 320-bit memory utilizing advanced low-power Schottky IMPACTE technology. It features high speed with fast fall-through times and is organized as 64 words by 5 bits.

A first-in, first-out (FIFO) memory is a storage device that allows data to be written into and read from its array at independent data rates. The SN74ALS235 is designed to process data at rates from 0 to 25 MHz in a bit-parallel format, word by word.

Data is written into memory on the rising edge of the shift-in (SI) input. When SI goes low, the first data word ripples through to the output (see Figure 1). As the FIFO fills up, the data words stack up in the order they were written. When the FIFO is full, additional shift-in pulses have no effect. Data is shifted out of memory on the falling edge of the shift-out (SO) input (see Figure 2). When the FIFO is empty, additional SO pulses have no effect. The last data word remains at the outputs until a new word falls through or reset (RST) goes low.

Status of the SN74ALS235 FIFO memory is monitored by the output-ready (OR), input-ready (IR), almost-full/almost-empty (AF/AE), and half-full (HF) flags. When OR is high, valid data is available at the outputs. OR is low when SO is high and stays low when the FIFO is empty. IR is high when the inputs are ready to receive more data. IR is low when SI is high and stays low when the FIFO is full. AF/AE is high when the FIFO contains eight or less words (see Figure 5) or 56 or more words (see Figure 6). AF/AE is low when the FIFO contains between nine and 55 words. HF is high when the FIFO contains 32 or more words and is low when the FIFO contains 31 words or less (see Figure 7).

When the SN74ALS235 FIFO is empty, input data is shifted to the output automatically when SI goes low. If SO is held high During this time, the OR flag pulses high indicating valid data at the outputs (see Figure 3).

When the SN74ALS235 FIFO is full, data can be shifted in automatically by holding SI high and taking SO low. One propagation delay after SO goes low, IR will go high. If SI is still high when IR goes high, data at the inputs are automatically shifted in. Since IR is normally low when the FIFO is full and SI is high, only a high-level pulse is seen on the IR output.