SN74ALS29825

• Functionally Equivalent to AMD AM29825 and AM29826
• Improved I_OH Specifications
• Multiple Output Enables Allow Multiuser Control of the Interface
• Outputs Have Undershoot Protection Circuitry
• Power-Up High-Impedance State
• Package Options Include Plastic "Small-Outline" Packages and Standard Plastic and Ceramic 300-mil DIPs
• Buffered Control Inputs to Reduce DC Loading Effect

These SN74ALS29825 8-bit flip-flops feature three-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing multiuser registers, I/O ports, bidirectional bus drivers, and working registers.

With the clock enable (CLKEN) low, the eight D-type edge-triggered flip-flops enter data on the low-to- high transitions of the clock. Taking CLKEN high will disable the clock buffer, thus latching the outputs. The 4ALS29825 has noninverting D inputs and the SN74ALS29825 has inverting D inputs. Taking the CLR input low causes the eight Q outputs to go low independently of the clock.

Multiuser buffered output-control inputs (OC1, OC2, and OC3) can be used to place the eight outputs in either a normal logic state (high or low level) or a high-impedance state. The outputs are also in the high-impedance state during power-up and power-down conditions. The outputs remain in the high-impedance state while the SN74ALS29825 is powered-down. In the high-impedance state the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive the bus lines in a bus-organized system without need for interface or pullup components. The output controls do not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

The SN54ALS29825 is characterized over the full military range of 55°C to 125°C. The SN74ALS29825 and SN74ALS29826 are characterized for operation from 0°C to 70°C.