Features: • 3-State I/O-Type Read-Back Inputs• Bus-Structured Pinout• Choice of True or Inverting Logic -SN74ALS666 . . . True Outputs-SN74ALS667 . . . Inverted Outputs• Preset and Clear Inputs• Package Options Include PlasticSmall-Outline (DW) Packages and StandardPl...
SN74ALS666: Features: • 3-State I/O-Type Read-Back Inputs• Bus-Structured Pinout• Choice of True or Inverting Logic -SN74ALS666 . . . True Outputs-SN74ALS667 . . . Inverted Outputs• Pres...
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• 3-State I/O-Type Read-Back Inputs
• Bus-Structured Pinout
• Choice of True or Inverting Logic
-SN74ALS666 . . . True Outputs
-SN74ALS667 . . . Inverted Outputs
• Preset and Clear Inputs
• Package Options Include PlasticSmall-Outline (DW) Packages and StandardPlastic (NT) 300-mil DIPs

These SN74ALS666 and SN74ALS667 8-bit D-type transparent latches aredesigned specifically for storing the contents ofthe input data bus, plus reading back the storeddata onto the input data bus. In addition, theyprovide a 3-state buffer-type output and are easilyutilized in bus-structured applications.
While the SN74ALS666 and SN74ALS667 latch enable (LE) is high, the Q outputsof the SN74ALS666 follow the data (D) inputs. TheQ outputs of the SN74ALS667 provide the inverseof the data applied to its D inputs. The Q orQ output of both devices is in the high-impedancestate if either output-enable (OE1 or OE2) input isat a high logic level. Read back is provided through the read-backcontrol (OERB ) input. When OERB is taken low,the data present at the output of the data latchespasses back onto the input data bus. When OERB is taken high, the output of the data latches isisolated from the D inputs. OERB does not affectthe internal operation of the latches; however,caution should be exercised to avoid a busconflict.
The SN74ALS666 and SN74ALS667 arecharacterized for operation from 0 to 70.