SN74ALS873B

Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range, TA: SN54ALS873B . . . . . . . . . 55to 125
                                                                    SN74ALS873B . . . . . . . . . . . . .0to 70
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65to 150

These SN74ALS873B and SN74AS873A dual 4-bit D-type latches feature 3-state outputs designed specifically for bus driving. These devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The SN74ALS873B and SN74AS873A dual 4-bit latches are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs in true form, according to the function table. When LE is low, the outputs are latched. When the clear (CLR) input goes low, the Q outputs go low independently of LE. The outputs are in the high-impedance state when the output-enable
(OE ) input is at a high logic level.

The SN54ALS873B and SN54AS873A are characterized for operation over the full military temperature range of 55 to 125. The SN74ALS873B and SN74AS873A are characterized for operation from 0 to 70.